Lots of current industrial fields have been utilizing electronic memory devices for storing information and central processing units (CPUs) for reading information from the memory devices to process necessary functions. For example, FIGS. 3 to 5 illustrate an apparatus that comprises a memory and a CPU to discriminate or validate valuable papers such as bills or coupons.
As shown in FIG. 3, an apparatus 10 for validating valuable papers comprises a magnetic sensor 22 of magnetic head or Hall effect element disposed adjacent to a passageway 29, optical sensors 23 to 26 of photocouplers each consisting of a light emitting diode and a light receiving transistor. Magnetic sensor 22 and optical sensors 23 to 26 provide a validating sensor 21 deployed in the proximity of passageway 29 so that a central processing unit or CPU 1 validates authenticity of a valuable paper and produces drive signals to a conveyor 16 in view of outputs from validating sensor 21.
Passageway 29 is defined by conveyor 16 which comprises convey belts 15 wound around drive pulleys 17 and guide walls 15a mounted in parallel relation to convey belts 15. Magnetic sensor 22 detects ferrous ink printed in a predetermined position on valuable paper. An optical sensor 23 located adjacent to an inlet 14 detects insertion of valuable paper into inlet 14 and an optical pattern of infrared ray penetrating the paper. For instance, optical sensor 23 comprises a light emitting diode 23a secured to lower frame 30 of validating apparatus 10 and a light receiving transistor 23b secured on upper frame 31.
Upper frame 31 is rotatably connected to lower frame 30 through a hinged structure not shown to upwardly open an end of upper frame 31 away from lower frame 30 to remove a jammed paper in passageway 29. Lower and upper frames 30, 31 form an entire frame of validating apparatus 10. Each of optical sensors 24, 25 comprises a light emitting diode and a light receiving transistor and a case for accommodating these light emitting and receiving elements to receive lights reflected on upper and bottom surfaces of the paper by each light receiving transistor. Optical sensor 26 comprises a light emitting diode 26a secured to lower frame 30 and a light receiving transistor 26b secured to upper frame 31 to detect permeation pattern of infrared ray penetrating the paper and thereby to sense passage and moved position of the paper.
A pinch roller 27 pushes the paper on magnetic sensor 22 to positively detect magnetic signals from the paper by magnetic sensor 22. Rotatably mounted on lower frame 30 are drive pulleys 17 around which convey belts 15 are wound, and rollers 32, 33 are rotatably attached to upper frame 31 opposite to drive pulleys 17 to push the paper on convey belts 15 by rollers 32, 33. Also, rotatably mounted around a shaft 35 behind optical sensor 25 is a lever 34 for detecting passage of paper, and to this end, one end of lever 34 is so resiliently drawn by a spring 36 that the other end of lever 34 projects into passageway 29. Passing lever 34 along passageway 29, the paper forcibly rotates lever 34 in the clockwise direction against resilient force of spring 36 to allow passage of the paper over lever 34. At the moment, rotation of lever 34 is detected by a lever sensor 37 of photosensor. Thus, the paper is transported along passageway 29 from inlet 14 through outlet 20 to a stacker 29 attached over validating apparatus 10.
As shown in FIG. 4, validating sensor 21 and lever sensor 37 are electrically connected to corresponding input terminals of (input device) CPU 1 whose output terminals (output device) are electrically connected to conveyor 16. CPU 1 comprises a one-chip micro-computer of such as large scale integrator (LSI) or discrete circuits to generate command outputs from output terminals in response to input signals received by input terminals. Conveyor 16 produces outputs for driving and controlling convey motor 32. CPU 1 receives from validating sensor 21 output signals representing optical or magnetic feature of the paper to compare the output signals from validating sensor 21 with a predetermined optical or magnetic pattern previously stored in a memory location 19 in existent memory 12. When output signals from validating sensor 21 correspond to information stored in memory location 19, CPU 1 produces outputs to conveyor 16 which forwards drive signals to convey motor 32 to transport the paper to outlet 20.
CPU 1 of validating apparatus 10 shown in FIG. 4, comprises an input device (not shown) electrically connected to validating sensor 21 and lever sensor 37 and an output device (not shown) electrically connected to conveyor 16. CPU 1 is electrically connected to existent memory 12 for storing operational information to produce program-controlled command signals from output device of CPU 1 in response to input signals received by input device of CPU 1 in accordance with the operational information stored in existent memory 12. Although the embodiment of validating apparatus 10 shows connection of validating sensor 21 and lever sensor 37 to input device of CPU 1 and connection of conveyor 16 to output device of CPU 1, variations in setting these elements can be made as necessary. Existent memory 12 comprises a memory control device 13 that has memory location 19 for storing operational program to transport the paper, acquire data from the paper and validate the paper, and an information memory 18 for storing addresses for information stored in memory location 19. CPU 1 comprises a control system for computing and controlling which includes control terminals for producing retrieval signals to existent memory 12, an inner memory for storing access space, and registers for temporarily retaining address and information. Address bus of lines A0-A15 is provided to transmit address signals from CPU 1 to existent memory 12, and a data bus to transmit data from existent memory 12 to CPU 1 so that CPU 1 designates an address stored in information memory 18 of existent memory 12 through address bus to read out, through data bus, information stored in memory location 19 to which addresses are assigned, and then, CPU 1 produces command signals to control conveyor 16 from output device of CPU 1 based on the fetched information.
Operation of CPU 1 and existent memory 12 is described hereinafter. FIG. 5 is a flow chart showing an operational sequence from insertion to stacking of the paper. When power switch 38 is turned on in Step 61 to supply electric power from power source 11, a reset signal is given to CPU 1 to initialize validating apparatus 10, and at the same time, CPU 1 forwards a first retrieval signal from RD output terminal to OE input terminal of existent memory 12 which therefore is turned into the readable mode. Then, CPU 1 accesses information memory 18 through address bus A0-A15 to gain information from memory location 19 to make preparations for receiving a paper. When the paper is inserted into inlet 14, inlet sensor 23 detects insertion of the paper in Step 62. When input device of CPU 1 receives a detection signal from inlet sensor 23, CPU 1 generates a retrieval signal to OE input terminal of existent memory 12 from RD output terminal of CPU 1 so that CPU 1 receives from existent memory 12 program necessary for conveying paper from inlet 14 along passageway 29 in validating apparatus 10, and to provide conveyor 16 with command signals from output device of CPU 1. Arriving at Step 63, the paper moved by conveyor 16 passes validating sensor 21 while magnetic sensor 22 and optical sensors 24 to 26 detect magnetic and optical features of the moving paper.
CPU 1 compares detected information from the paper with denomination information stored in memory location 19 of existent memory 12 (in Step 64) to determine correct denomination or kind of the paper (in Step 65). When the correct paper denomination is decided in Step 65, processing moves to Step 66 wherein CPU 1 compares detected information from the paper with information of the genuine document or paper previously stored in memory location 19 to validate authenticity of the paper. When CPU 1 validates and regards the paper as genuine in Step 67, it sends conveyor 16 command signals to drive convey motor 32, transport the paper along passageway 29 and put the paper in stacker 28 (in Step 68). When CPU 1 decides that the denomination of the paper is different from that stored in memory location 19 in Step 65 or when CPU 1 determines that the paper is not genuine in Step 67, conveyor 16 is driven in the adverse direction to return the paper to inlet 14 (Step 69).
By the way, in such a prior art validating apparatus 10, CPU 1 must be operated with different program which includes new validating criteria when new bills or new valuable papers are issued, and moreover, memory location 19 of existent memory 12 must have validating criteria program for existing and new valuable papers because both of them are put into circulation in markets. In such a case, capacity of memory location 19 in existent memory 12 should be enlarged if the existent memory capacity is too small to install the expanded program. However, expansion of memory capacity would be very difficult because increase of memory capacity in existent memory 12 requires increase of the address number and address bus, and therefore, CPU 1 as well as existent memory 12 had to be exchanged for new one.
Accordingly, an object of the present invention is to provide a storage control device of bank structure capable of operating a controlled system connected to a CPU of smaller capacity in accordance with information read out from a large capacity storage to CPU. Also, another object of the present invention is to provide a storage control device of bank structure which comprises an existent memory exchangeable for a large capacity storage without exchanging CPU. Still another object of the present invention is to provide an apparatus equipped with such a storage control device for validating valuable papers.